A low latency and low power indirect topology for on-chip communication

English version

Autoři: Usman Ali Gulzari ^aff001; Sarzamin Khan ^aff002; Muhammad Sajid ^aff003; Sheraz Anjum ^aff004; Frank Sill Torres ^aff005; Hessam Sarjoughian ^aff006; Abdullah Gani ^aff007
Působiště autorů: Department of Electrical Engineering, The University of Lahore, Islamabad, Pakistan ^aff001; Department of Electrical Engineering, COMSATS University Islamabad, Wah Campus, Wah Cantt, Pakistan ^aff002; Department of Electrical and Computer Engineering, University of Western Ontario, London, Ontario, Canada ^aff003; Department of Computer Science, COMSATS University, Islamabad, Wah Campus, Wah Cantt, Pakistan ^aff004; German Aerospace Center, Institute for the Protection of Maritime Infrastructures, Bremerhaven, Germany ^aff005; Arizona Center for Integrative Modeling & Simulation, Arizona State University, Tempe, United States of America ^aff006; Faculty of Computing and Informatics, Universiti Malaysia Sabah, International Campus Labuan, WP Labuan, Malaysia ^aff007
Vyšlo v časopise: PLoS ONE 14(10)
Kategorie: Research Article
prolekare.web.journal.doi_sk: https://doi.org/10.1371/journal.pone.0222759

Souhrn

This paper presents the Hybrid Scalable-Minimized-Butterfly-Fat-Tree (H-SMBFT) topology for on-chip communication. Main aspects of this work are the description of the architectural design and the characteristics as well as a comparative analysis against two established indirect topologies namely Butterfly-Fat-Tree (BFT) and Scalable-Minimized-Butterfly-Fat-Tree (SMBFT). Simulation results demonstrate that the proposed topology outperforms its predecessors in terms of performance, area and power dissipation. Specifically, it improves the link interconnectivity between routing levels, such that the number of required links isreduced. This results into reduced router complexity and shortened routing paths between any pair of communicating nodes in the network. Moreover, simulation results under synthetic as well as real-world embedded applications workloads reveal that H-SMBFT can reduce the average latency by up-to35.63% and 17.36% compared to BFT and SMBFT, respectively. In addition, the power dissipation of the network can be reduced by up-to33.82% and 19.45%, while energy consumption can be improved byup-to32.91% and 16.83% compared to BFT and SMBFT, respectively.

Klíčová slova:

Network analysis – Algorithms – Memory – Telecommunications – Intelligence – Energy transfer – Network bandwidth – Moths and butterflies

Zdroje

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A low latency and low power indirect topology for on-chip communication

Souhrn

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